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ISSCC 2011Session 20 · HIGH-SPEED TRANSCEIVERS & BUILDING BLOCKSWireline I/O0.13µm CMOS

A 0.076mm2 3.5GHz Spread-Spectrum Clock Generator with Memoryless Newton-Raphson Modulation Profile in 0.13µm CMOS

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📋 论文概要

本文提出了一款基于无记忆牛顿-拉夫森调制曲线的扩频时钟发生器(SSCG),在0.13µm CMOS工艺下实现0.076mm²的小面积和3.5GHz的工作频率,有效降低了高速系统中的电磁干扰(EMI)。

💡 主要创新点

核心指标
面积0.076mm²,频率3.5GHz
工艺节点
0.13µm CMOS
重要性
发表年份
ISSCC 2011

🏷 关键词

扩频时钟发生器牛顿-拉夫森调制电磁干扰抑制锁相环0.13µm CMOS

📄 原文摘要

EMI, which has become a serious problem in high-speed systems. In applications such as serial links, display drivers and consumer electronics, SSCG is essential or strongly recommended. Control options such as frequency deviation (δ) and modulation frequency (fm) help to satisfy these demands. Furthermore, efficient modulation-profile generation is critical for achieving further EMI reduction and lowering fabrication cost. PLL-based SSCGs are reported in [1-3]. The ΔΣ modulator (ΔΣM) controls the division ratio [1,2] and the phase information of phase detector (PD) [3] to generate a spread-spectrum clock. The self-referenced clock generator uses a capacitor array to generate a spread-spectrum clock [7]. However, they do not have a way to control δ and fm. Dual-loop direct VCO modulation [4] and digital period synthesizer with delay-line [5] are able to

👥 作者与机构

Sewook Hwang, Minyoung Song, Young-Ho Kwak, Inhwa Jung, Chulwoo Kim

Korea University, Seoul, Korea A spread-spectrum clock generator (SSCG) is a cost-effective solution to reduce

分类:Wireline I/O · 年份:ISSCC 2011