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ISSCC 2011Session 25 · CDRs & EQUALIZATION TECHNIQUESWireline I/O65nm CMOS

A 5Gb/s Adaptive DFE for 2× Blind ADC-Based CDR in 65nm CMOS (αi, αi+4) are provided to the DFE to be subtracted from the two adjacent samples of ADC, which are ½ UI apart.

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📋 论文概要

该论文提出了一种5Gb/s的自适应判决反馈均衡器(DFE),用于基于2倍盲ADC的时钟数据恢复(CDR)系统,解决了高速串行链路中的符号间干扰(ISI)问题。通过利用ADC样本进行自适应均衡,实现了低功耗和高数据率。

💡 主要创新点

核心指标
5Gb/s数据率
工艺节点
65nm CMOS
重要性
发表年份
ISSCC 2011

🏷 关键词

自适应判决反馈均衡器盲ADC时钟数据恢复65nm CMOS符号间干扰

📄 原文摘要

For this PD, a triangular waveform is the ideal waveform as its interpolated zerocrossings coincide with the actual zero-crossings. Figure 25.1.3 shows how the amplitude of the desired waveform is generated. Two adjacent ADC samples (S8 and S9) are fed to a 2:1 MUX which selects one of the two based on proximity to eye’s center. Ideally the value at the center of the eye should be interpolated to provide an estimate of the eye height, however, this increases hardware complexity. The absolute value of the selected sample is averaged using a first-order digital lowpass filter to produce SAVE. Desired references are then generated from SAVE and ΦAVE in a dynamic lookup table with the stored shape of the triangular waveform. We use two different dynamic look up tables so that dref-1,2 correspond to 2 blind samples of ½ UI apart, corresponding to two different reference levels. 25.1 1 2 University of Toronto, Toronto, Canada

👥 作者与机构

Behrooz Abiri1, Ali Sheikholeslami1, Hirotaka Tamura2, Masaya Kibune2, The PD in the digital CDR uses linear interpolation to recover zero-crossings [4].

分类:Wireline I/O · 年份:ISSCC 2011