A 0.5-to-2.5Gb/s Reference-less Half-Rate Digital CDR with Unlimited Frequency Acquisition Range and Improved Input Duty-Cycle Error Tolerance

📋 论文概要

提出一种0.5-2.5Gb/s无参考时钟的半速率数字时钟数据恢复电路，采用新型频率检测器实现无限频率采集范围，解决了传统旋转频率检测器采集范围有限、功耗大和易谐波锁定的问题，同时改进了输入占空比。

💡 主要创新点

• 采用新型频率检测器实现无限频率采集范围，避免谐波锁定
• 半速率数字架构降低功耗和复杂度
• 改进输入占空比处理以提高数据恢复可靠性

🏷 关键词

📄 原文摘要

acquisition range offer flexibility in optical communication networks, help reduce link power through activity-based rate adaptation, and minimize cost with a single-chip multi-standard solution. Extracting the bit rate from the incoming random data stream is the main challenge in implementing reference-less CDRs. A conventional rotational frequency detector has a limited acquisition range of about ±50% of the VCO frequency, consumes large power, and is susceptible to harmonic locking. Extending its range requires additional high-speed circuitry and a complex state machine [1]. The DLL-based architecture in [2] requires passing high-speed data through a long string of power-hungry buffers, imposes stringent matching requirements, and works only with ring oscillators. Other approaches require detailed statistical [3] or timing analysis [4]. Further, all the

👥 作者与机构

Rajesh Inti, Wenjing Yin, Amr Elshazly, Naga Sasidhar, Pavan Kumar Hanumolu

Oregon State University, Corvallis, OR Clock and data recovery (CDR) circuits with wide frequency