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ISSCC 2011Session 25 · CDRs & EQUALIZATION TECHNIQUESWireline I/O

A 15Gb/s 0.5mW/Gb/s 2-Tap DFE Receiver with Far-End Crosstalk Cancellation

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📋 论文概要

该论文提出了一种15Gb/s、0.5mW/Gb/s的2抽头判决反馈均衡器(DFE)接收机,并集成了远端串扰消除功能,旨在解决高数据率互连中的信道衰减和功耗问题。通过低功耗DFE设计和串扰消除技术,实现了高能效的链路性能提升。

💡 主要创新点

核心指标
15Gb/s, 0.5mW/Gb/s
重要性
发表年份
ISSCC 2011

🏷 关键词

判决反馈均衡器远端串扰消除低功耗接收机

📄 原文摘要

The increasing demand for high-bandwidth interconnection between integrated circuits requires large numbers of I/Os per chip as well as high data rates per I/O. Key limitations in meeting these requirements include channel characteristics and I/O power consumption. Even in short interconnects, the channel attenuation at very high data rates is significant, and using receiver equalization can greatly improve the link performance [1-5]. However, compensating a high level of loss requires many taps of equalization, which can significantly reduce the power efficiency of the link. Parallel data transmission increases the aggregate data rate, but compact traces placed in close proximity suffer from a high level of crosstalk interference. This problem is exacerbated when transmit preemphasis techniques are exploited to boost the high frequency gain. While the use of differential signaling can mitigate the effect of crosstalk, it requires twisting pairs leading to area and bandwidth penalties.

👥 作者与机构

Meisam Honarvar Nazari, Azita Emami-Neyestanak

California Institute of Technology, Pasadena, CA

分类:Wireline I/O · 年份:ISSCC 2011