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该论文提出一种采用半UI IIR抽头结构的10Gb/s发射器，在40nm CMOS工艺下实现，旨在满足SFI和10GBASE-KR标准对低数据相关抖动（DDJ）和低发射波形色散惩罚（TWDPc）的要求，解决铜双轴电缆和背板通道的高速串行数据均衡问题。
Netlogic Microsystems, Santa Clara, CA Two commercially important standards for 10Gb/s serial data transfer include the SFI specification, associated with SFP+ optical modules and copper twinaxial cable [1], and the 10GBASE-KR specification for backplane channels in computer servers and networking equipment [2]. The SFI specification requires the transmitter to operate with both low data-dependent jitter (DDJ) and low transmitter waveform dispersion penalty (TWDPc where the “c” denotes direct-attach copper cable). The SFI TWDPc specification is associated with the copper twinaxial cable channel in [1] and is defined as the ratio (in dB) between the signal-to-noise ratio (SNR) of a matched-filter receiver and the SNR at the slicer input of an ideal, adapted, FFE+DFE receiver [3]. In data center applications it is necessary to use the same serial transmitter IC (with no change in transmitter
Halil Cirit, Marc J Loinaz