A 108dB-DR 120dB-THD and 0.5Vrms Output Audio DAC with Inter-Symbol-Interference-Shaping Algorithm in 45nm CMOS

📋 论文概要

该论文提出了一种采用码间干扰（ISI）整形算法的音频DAC，在45nm CMOS工艺中实现了108dB动态范围和120dB总谐波失真性能，输出电压为0.5Vrms。主要解决了多级DAC中动态误差源（如不对称开关、时钟歪斜和寄生记忆）导致的失真问题。

💡 主要创新点

• 提出了一种码间干扰整形算法，有效补偿了DAC元件的动态误差，降低了失真。
• 结合精细分辨率量化技术，降低了带外噪声和对时钟抖动的敏感度，简化了模拟滤波。
• 使用了多级DAC结构（分段或级联）配合整形算法，实现了高线性度和高动态范围。

🏷 关键词

📄 原文摘要

fine-resolution quantization to reduce the out-of-band noise (OBN), reduce jitter sensitivity, and simplify analog filtering. Recent techniques achieve this goal by using a mix of DAC elements with different weights, e.g., segmenting [1] or cascading [2]. Unlike 1b modulation, the multi-level DACs need mismatch shaping algorithms to compensate for the typical 0.1 to 1% on-die mismatch. In addition to the element mismatch, dynamic error sources such as asymmetrical switching, clock skew, and parasitic memory are major hindrances to achieve distortion and dynamic range targets. The resulting dependence of present symbol error to the past symbol is referred to as inter-symbol-interference (ISI), and is a function of the switching activity of all the individual DAC elements. Unfortunately, the popular mismatch-shaping algorithms (e.g., rotation-DWA) are addressi

👥 作者与机构

Lars Risbo1, Rahmi Hezar2, Burak Kelleci2, Halil Kiper2, Mounir Fares2, 1

Texas Instruments, Copenhagen, Denmark Texas Instruments, Dallas, TX 2 The current trend in high-performance audio DACs is to use