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该论文提出了一种具有自对准注入窗口的注入锁定环形PLL,解决了传统注入锁定PLL中注入窗口与VCO相位对齐困难的问题,实现了低抖动和宽环路带宽。
In modern analog front-ends, there is an increasing demand on high- performance analog-to-digital converters (ADCs), which require high sampling frequency and low-jitter sampling clock. This makes low-jitter phase-locked loops (PLLs) with jitter on the order of few picoseconds desirable. Unfortunately, due to stringent limit on die area, sometimes a PLL with a ring oscillator is the only choice. To get better phase noise, a wider loop bandwidth is needed to suppress the noise of the voltage-controlled oscillator (VCO). However, due to the discrete-time nature of the operations, the loop bandwidth is limited to one-tenth of the crystal oscillator (XTAL) frequency. One way to solve this problem is to use the injection-locking technique. This method exploits the clean reference clock but has several production problems. One is the frequency offset between injection signal and VCO, and this can be solved by using the injection-locked PLL
Che-Fu Liang, Keng-Jan Hsiao
MediaTek, Hsinchu, Taiwan