A 28nm 0.6V Low-Power DSP for Mobile Applications

📋 论文概要

该论文介绍了一款采用28nm低功耗工艺制造的多媒体应用处理器，基于TMS320C64x+ VLIW DSP架构，集成了32kB L1和128kB L2缓存以及多种外设接口，旨在实现超低功耗移动应用。

💡 主要创新点

• 采用28nm低功耗工艺实现0.6V超低电压操作，显著降低功耗。
• 集成了4发射、32寄存器的VLIW DSP核心，优化了多媒体处理性能。
• 通过系统级集成（SoC）减少外部组件，提升能效和面积效率。

🏷 关键词

📄 原文摘要

J. Gu3, Alice Wang1, Hugh Mair1, Satyendra Datla1, Bing Rong1, Sushma Honnavara-Prasad1, Lam Ho1, Greg Baldwin1, Dennis Buss1, Anantha P Chandrakasan2, Uming Ko1 1 Texas Instruments, Dallas, TX, Massachusetts Institute of Technology, Cambridge, MA, 3 Texas Instruments (now with MaxLinear), Dallas, TX 2 A multimedia applications processor is fabricated using a 28nm low-power process technology for ultra-low-power applications. Based on a 4-issue, 32register version of the TMS320C64x+ VLIW DSP, this System on Chip (SoC) includes 32kB L1 and 128kB L2 caches, and I2S, SPI, UART, MultiMediaCard, and external memory interfaces (Fig. 7.5.1). The design incorporates over 600k instances of custom low-voltage logic cells and 43 instances (1.6 Mb) of 6T SRAM. Utilizing ultra-low-voltage (ULV) optimized standard-cell libraries and 6T SRAM macros, and demonstrating a new statistical static timing analysis (SSTA)

👥 作者与机构

Gordon Gammie1, Nathan Ickes2, Mahmut E Sinangil2, Rahul Rithe2,