← 返回论文列表 📄 下载原文 PDF  ISSCC 2013 · 11.1
ISSCC 2013Session 11 · EMERGING MEMORY AND WIRELESS TECHNOLOGYMemory0.13µm CMOS

A 3.4pJ FeRAM-Enabled D Flip-Flop in 0.13µm CMOS for Nonvolatile Processing in Digital Systems

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

该论文提出了一种基于铁电电容的非易失性D触发器(NVDFF),能够在频繁断电时保持电路状态,适用于能量采集和常关系统。通过嵌入式铁电电容实现数据鲁棒感知,避免了竞争问题,并实现了3.4pJ的低能耗。

💡 主要创新点

核心指标
3.4pJ
工艺节点
0.13µm CMOS
重要性
发表年份
ISSCC 2013

🏷 关键词

非易失性D触发器铁电电容低能耗

📄 原文摘要

Texas Instruments, Dallas, TX 1 2 Nonvolatile processing—continuously operating a digital circuit and retaining state through frequent power interruptions—creates new applications for portable electronics operating from harvested energy [1] and high-performance systems managing power by operating “normally off” [2]. To enable these scenarios, energy processing must happen in parallel with information processing. This work makes the following contributions: 1) the design of a nonvolatile D flip-flop (NVDFF) with embedded ferroelectric capacitors (fecaps) that senses data robustly and avoids race conditions; 2) the integration of the NVDFF into the ASIC design flow with a power management unit (PMU) and a simple one-bit interface to brown-out detection circuitry; and 3) a characterization of the NVDFF statistical signal margin and the energy cost of retaining data. This chip’s process technology features embedded ferroelectric capacitors that

👥 作者与机构

Masood Qazi1, Ajith Amerasekera2, Anantha P. Chandrakasan1

Massachusetts Institute of Technology, Cambridge, MA,

分类:Memory · 年份:ISSCC 2013