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ISSCC 2013Session 12 · NON-VOLATILE MEMORY SOLUTIONSMemory40nm CMOS

Time-Differential Sense Amplifier for Sub-80mV Bitline Voltage Embedded STT-MRAM in 40nm CMOS

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📋 论文概要

本文提出了一种时间差分敏感放大器,用于嵌入式STT-MRAM在低于80mV位线电压下的读取操作,解决了由低隧穿磁阻比(TMR)导致的小读窗口和读干扰问题。

💡 主要创新点

工艺节点
40nm CMOS
重要性
发表年份
ISSCC 2013

🏷 关键词

STT-MRAM时间差分敏感放大器低电压读取

📄 原文摘要

Jan Otterstedt1, Othmane Bahlous1, Karl Hofmann1, Robert Allinger1, Stephan Kassenetter1, Doris Schmitt-Landsiedel2 Infineon Technologies, Neubiberg, Germany, Technical University Munich, Munich, Germany 1 2 Spin-torque-transfer (STT) MRAM is a promising candidate for embedded nonvolatile memory in next generation microcontrollers, because of superior endurance, low process costs and logic supply voltage operation. Two major drawbacks of STT-MRAM technology are the small read window because of the low tunnel magnetic resistance (TMR) ratio, and the low read current due to read disturb, which is proportional to the bitline (BL) voltage [1]. To maximize the read window and minimize read disturb, the BL potential has to be as low as possible, since the TMR ratio goes up and the read disturb is reduced with decreasing BL potential [1]. The read disturb can also be reduced by adaptive BL voltage control [2]. But this requires a complex sense amplifier

👥 作者与机构

Mihail Jefremow1,2, Thomas Kern1, Wolf Allers1, Christian Peters1,

分类:Memory · 年份:ISSCC 2013