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ISSCC 2013Session 14 · DIGITAL PLLs AND BUILDING BLOCKSDigital Circuits

A 95fJ/b Current-Mode Transceiver for 10mm On-Chip Interconnect

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📋 论文概要

提出一种用于10mm片内互连的电流模式收发器,通过有源电感均衡技术降低功耗,实现了95fJ/b的能效,并采用自动关断机制减少静态功耗。

💡 主要创新点

核心指标
95fJ/b @ 10mm on-chip interconnect
重要性
发表年份
ISSCC 2013

🏷 关键词

电流模式收发器片内互连有源电感均衡低功耗

📄 原文摘要

sense-amplifier load in the receiver. In this work, IDRV and IPE were set to 95μA and 45μA, respectively. For the receiver equalization, the PMOS diode in the sense-amplifier load is modified to form an active inductor configuration without any extra power consumption. Since the current-sensing circuit is attached only as the load of the open-draintype transmitter, there is no additional DC current path in the receiver. So the current sense-amplifier load is automatically turned off when transmitter is off. 2 Data communication between local system blocks through on-chip global interconnects presents significant design challenges in scaled VLSI systems. The goal of this research is to reduce the energy consumed per bit transmitted, while

👥 作者与机构

Seon-Kyoo Lee1,2, Seung-Hun Lee1, Dennis Sylvester3, David Blaauw3, Jae-Yoon Sim1

Pohang University of Science and Technology, Pohang, Korea, Samsung Electronics, Hwasung, Korea, 3 University of Michigan, Ann Arbor, MI 1 pull-down current for fast operation of the

分类:Digital Circuits · 年份:ISSCC 2013