A 64Mb SRAM in 22nm SOI Technology Featuring Fine-Granularity Power Gating and Low-Energy Power-Supply-Partition Techniques for 37% Leakage Reduction

📋 论文概要

该论文介绍了一款采用22nm SOI工艺制造的64Mb SRAM，通过细粒度电源门控和低能耗电源分区技术，有效降低了泄漏功耗并提高了存储密度。

💡 主要创新点

• 提出细粒度电源门控技术，实现对SRAM子阵列的精确功耗管理。
• 采用低能耗电源分区技术，优化供电网络以降低动态和静态功耗。

🏷 关键词

📄 原文摘要

Steven M. Lamphier1, Michael M. Lee1, Frank M. Pavlik1, Sushma N. Sambatur3, Adnan Seferagic1, Richard Wu1, Mohammad I. Younus4 IBM, Essex Junction, VT, 2IBM, Rochester, MN, 3IBM, Bangalore, India, IBM, Hopewell Junction, NY 1 4 A 64Mb SRAM is fabricated in a 22nm high-performance SOI technology [1]. The ever-increasing integration needs of complex SoC are driving the reduction of SRAM leakage power and increase in memory density. While the area and leakage power benefits of eDRAM continue to be leveraged in applications with large contiguous memory blocks [2], SRAM leakage remains a significant portion of the total SoC power. This work describes an SRAM that is optimized for leakage and performance as top priorities over density. The SRAM features a new bitcell (BC) implemented with a fine-granularity power-gating (FGPG) technique to reduce BC leakage by 37%. FGPG improves leakage reduction by 2×

👥 作者与机构

Harold Pilo1, Chad A. Adams2, Igor Arsovski1, Robert M. Houle1,