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ISSCC 2013Session 20 · FREQUENCY GENERATIONClocking & PLLs32nm CMOS

A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz Minimum Noise FOM Using Inductor Splitting for Tuning Extension

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📋 论文概要

本文提出一种采用电感分裂技术扩展调谐范围的32nm CMOS VCO,工作频率33.6-46.2GHz,实现了177.5dBc/Hz的最小噪声FOM,解决了毫米波频段超宽调谐与低相位噪声的挑战。

💡 主要创新点

核心指标
33.6-46.2GHz调谐范围,177.5dBc/Hz最小噪声FOM
工艺节点
32nm CMOS
重要性
发表年份
ISSCC 2013

🏷 关键词

VCO毫米波电感分裂调谐范围相位噪声

📄 原文摘要

Signal processing in ultra-wide bandwidths is one of the key challenges in the design of multi-Gb/s wireless transceivers at mm-Waves, where channels covering 57GHz to 66GHz are specified. Further considering spreads due to process variations and the stringent reference phase noise to ensure signal integrity calls for an ultra-wide tuning range and low-noise on-chip oscillator. Meeting this target is even more challenging when adopting an ultra-scaled CMOS technology node where key passive components suffer from a reduced quality factor (Q) [1]. In a 32nm node the thickness of metals closer to the substrate is half that in a 65nm process leading, for example, to MOM capacitors with roughly half Q. The penalty is only marginally compensated by the higher transistor ft, improved only by ~20%. Various techniques exploiting alternative tuning implementations have been published recently. Magnetic tuning methods where the equivalent tank

👥 作者与机构

Enrico Mammei1, Enrico Monaco2, Andrea Mazzanti1, Francesco Svelto1

University of Pavia, Pavia, Italy, 2STMicroelectronics, Pavia, Italy

分类:Clocking & PLLs · 年份:ISSCC 2013