A 32Gb/s Wireline Receiver with a Low-Frequency

📋 论文概要

该论文介绍了一款采用28nm CMOS工艺的32Gb/s有线接收器，集成了CTLE和2抽头DFE均衡器。主要解决了高速数据传输中因信道损伤引起的码间干扰问题。

💡 主要创新点

• 采用CTLE和2抽头DFE组合均衡架构，有效补偿信道损耗。
• 在28nm CMOS工艺下实现了32Gb/s的高速接收器设计。

🏷 关键词

📄 原文摘要

Samir Parikh1, Tony Kao1, Yasuo Hidaka1, Jian Jiang1, Asako Toda1, Scott Mcleod1, William Walker1, Yochi Koyanagi2, Toshiyuki Shibuya2, Jun Yamada3 Fujitsu Laboratories of America, Sunnyvale, CA, Fujitsu Laboratories, Kawasaki, Japan, 3Fujitsu, Kawasaki, Japan 1 2 Standards such as OIF CEI-25G, CEI-28G and 32G-FC require transceivers operating at high data rates over imperfect channels. Equalizers are used to cancel the inter-symbol interference (ISI) caused by frequency-dependent channel losses such as skin effect and dielectric loss. The primary objective of an equalizer is to compensate for high-frequency loss, which often exceeds 30dB at fs/2. However, due to the skin effect in a PCB stripline, which starts at 10MHz or lower, we also need to compensate for a small amount of loss at low frequency (e.g., 500MHz). Figure 2.1.1 shows simulated responses of a backplane channel (42.6dB loss at fs/2 for 32Gb/s) with conventional high-frequency equalizers

👥 作者与机构

Equalizer, CTLE and 2-Tap DFE in 28nm CMOS