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ISSCC 2013Session 24 · ENERGY-AWARE DIGITAL DESIGNDigital Circuits40nm LP CMOS

Reliable and Energy-Efficient 1MHz 0.4V Dynamically Reconfigurable SoC for ExG Applications in 40nm LP CMOS

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📋 论文概要

该论文提出了一种用于生物电信号(ExG)应用的动态可重构SoC,工作在0.4V超低电压和1MHz频率,采用40nm LP CMOS工艺。通过片上信号处理减少无线电通信能耗,解决了无线传感器节点的能量约束问题,实现了可靠且高能效的操作。

💡 主要创新点

工艺节点
40nm LP CMOS
重要性
发表年份
ISSCC 2013

🏷 关键词

动态可重构超低电压ExGSoC能量效率40nm LP CMOS

📄 原文摘要

Tobias Gemmeke1, Changmoo Kim2, Jos Hulzink1, Jan Stuyt1, Mookyung Jung2, Jos Huisken1, Soojung Ryu2, Jungwook Kim2, Harmke de Groot1 imec - Holst Centre, Eindhoven, The Netherlands, Samsung Advanced Institute of Technology, Seoul, Korea 1 2 Wireless Sensor Nodes (WSN) have a wide range of applications in health care and life style monitoring. Their severe energy constraint is often addressed through minimizing the amount of transmitted data by way of energy-efficient on-node signal processing. The rationale for this approach is that a large portion of WSN energy is consumed by the radio communication even for very low-datarate situations [1]. Efficient on-node processing has been the subject of recent work, with the common element being aggressive voltage scaling into the subthreshold region [2-4]. A major assumption of the existing works is that the amount of required computation is low, justifying an on-node processor with

👥 作者与机构

Mario Konijnenburg1, Yeongojn Cho2, Maryam Ashouei1,

分类:Digital Circuits · 年份:ISSCC 2013