A 200mW 100MHz-to-4GHz 11th-Order Complex Analog Memory Polynomial Predistorter for Wireless Infrastructure RF Amplifiers Frederic Roger

📋 论文概要

该论文提出了一种全集成、11阶、4记忆项、温度补偿的复杂模拟多项式预失真器，用于无线基础设施射频功率放大器的线性化。它采用0.18μm CMOS工艺，无需校准，在100MHz至4GHz频率范围内功耗仅200mW，可提供高达25dB的线性度改善，解决了小基站中数字预失真功耗高、成本高的问题。

💡 主要创新点

• 首次实现全集成11阶4记忆项复杂模拟多项式预失真器，无需数字校准。
• 集成温度补偿电路，确保宽温度范围内性能稳定。
• 在0.18μm CMOS工艺上实现200mW低功耗和100MHz-4GHz宽带工作。

🏷 关键词

📄 原文摘要

base stations (macro-BTS) with lightweight and easy to deploy small cells calls for inexpensive and efficient Power Amplifier (PA) linearizers. Current macroBTSs relying on Digital Predistortion Techniques (DPD) are too power hungry and costly to be used in small cells. In this paper, we present a fully integrated, 11th-order, 4-memory term, temperature-compensated complex analog polynomial predistorter. It is implemented in 0.18μm CMOS, does not require calibration and offers up to 25dB linearity improvement. Several integrated [1,2] and discrete [3,4] implementations of Analog Predistorters (APD) have been published. This paper reports a complex high-order predistorter integrating the RF and the IF on the same die (RFPD). Wireless infrastructure transmitters must support varying signal bandwidths (BW) up to 20MHz, 40MHz or even higher. As a result, narrowband PA efficiency enhancement techniques used in mobile applications such as envelope tracking or Cartesian feedback cannot be use

👥 作者与机构

Scintera, Sunnyvale, CA, The trend toward heterogeneous networks encompassing legacy high-power