A Quad 25Gb/s 270mW TIA in 0.13µm BiCMOS with <0.15dB Crosstalk Penalty

📋 论文概要

该论文设计了一个四通道25Gb/s跨阻放大器（TIA），采用0.13µm BiCMOS工艺，总功耗仅270mW，串扰惩罚低于0.15dB。解决了多通道并行光接收机中因通道间串扰导致的性能下降问题，适用于100Gb/s及以上光传输系统。

💡 主要创新点

• 实现了四通道25Gb/s TIA，总功耗仅270mW，每通道功耗低，适合高密度集成。
• 通过电路和版图优化，将通道间串扰惩罚控制在0.15dB以下，显著提升多通道接收性能。
• 采用0.13µm BiCMOS工艺，兼顾了高速性能和低功耗，为下一代光收发器提供了低成本、高集成度方案。

🏷 关键词

📄 原文摘要

Finisar, Sunnyvale, CA The push for 100Gb/s optical transport and beyond necessitates electronic components at higher speed and integration level in order to drive down cost, complexity and size of transceivers [1-2]. This requires parallel multi-channel optical transceivers each operating at 25Gb/s and beyond. Due to variations in the output power of transmitters and in some cases different optical paths the parallel receivers have to operate at different input optical power levels. This trend places increasing strain to the acceptable inter-channel crosstalk in integrated multichannel receivers [3]. Minimizing this cross-talk penalty when all channels are operational is becoming increasingly important in ultra-high throughput optical links. One of the fundamental sources of crosstalk in multi-channel optical receivers stems from the fact that the photodiode provides a single-ended current and the

👥 作者与机构

Georgios Kalogerakis, Tim Moran, Thelinh Nguyen, Gilles Denoyer