A 4× 25-to-28Gb/s 4.9mW/Gb/s -9.7dBm HighSensitivity Optical Receiver Based on 65nm CMOS for Board-to-Board Interconnects

📋 论文概要

本文提出一种基于65nm CMOS的4×25-28Gb/s光接收机，通过偏移消除TIA和增大跨阻降低噪声，实现-9.7dBm的高灵敏度，功耗仅4.9mW/Gb/s，适用于板间互连。

💡 主要创新点

• 采用带偏移消除器的TIA，将峰值电流变化减少96%
• 通过提高跨阻将输入噪声从3.5μArms降至2.6μArms
• 实现2.2倍总跨阻提升，达到86μApp灵敏度对应-9.7dBm OMA

🏷 关键词

📄 原文摘要

[4]. The developed TIA (with an offset canceller) reduces peak-to-peak current variations due to offset voltage by 96%. Moreover, I PrA n,rms is reduced from 3.5μArms to 2.6μArms by increasing ZPrA. With an increase in total transimpedance of 2.2×, the receivable output voltage appearing at the input port is also reduced. The sensitivity is therefore expected to be 86μApp, which gives –9.7dBm OMA when PD responsivity is 0.80A/W. 1 2 Growing data traffic requires low-power 25Gb/s-class optical interconnects for board-to-board transmission inside ICT systems [1-4]. The main power consumption of an optical link strongly depends on the sensitivity of the TIA; thus, development of a high-sensitivity TIA is a key to creating a low-power optical

👥 作者与机构

Takashi Takemoto1, Hiroki Yamashita1, Toru Yazaki2, Norio Chujo2,

Yong Lee1, Yasunobu Matsuoka1 Hitachi, Tokyo, Japan, Hitachi, Kanagawa, Japan TIA reduces the power-supply noise by 78% and the estimated I in,pp is 165μApp