Note that ISS is properly biased by constant IR circuit, whose on-chip resistor experiences the same variation as RD does. With RB and CB providing unaltered bias point to M2, signal current Iin flows through RF and currents into voltage as Vout. Here, LD extends the 50Ω matching from 23GHz to 26GHz, and inductive peaking is also used in the output point to further broaden the bandwidth. TIA reveals 40dB gain while consuming 4.8mW of power. 2 This paper presents a complete design of 100GbE chipsets including gearbox TX/RX, LDD and TIA/LA arrays. Figure 7.3.1 shows the architecture, where 10×10Gb/s input data is serialized into 4×25Gb/s bit stream by a 10:4 serializer (i.e., gearbox TX). A 4-element LDD array subsequently drives 4 laser diodes, emitting 850nm light into 4 multimode fibers (MMFs). After traveling over
Jhih-Yu Jiang1, Ping-Chuan Chiang1, Hao-Wei Hung1, Chen-Lun Lin1,
Ty Yoon2, Jri Lee1 National Taiwan University, Taipei, Taiwan, Basas Microelectronics, Beijing, China 1 regardless of PVT variations