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ISSCC 2013Session 7 · OPTICAL TRANSCEIVERS AND SILICON PHOTONICSWireline I/O45nm CMOS

A 1.23pJ/b 2.5Gb/s Monolithically Integrated Optical Carrier-Injection Ring Modulator and All-Digital Driver Circuit in Commercial 45nm SOI

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📋 论文概要

该论文提出了一种单片集成的光学载流子注入环形调制器及其全数字驱动电路,实现了2.5Gb/s的数据速率和1.23pJ/b的能效,解决了硅光子互连中高带宽密度和低能耗的需求。

💡 主要创新点

核心指标
1.23pJ/b @ 2.5Gb/s
工艺节点
45nm CMOS
重要性
发表年份
ISSCC 2013

🏷 关键词

硅光子环形调制器载流子注入全数字驱动低功耗互连

📄 原文摘要

Jason S. Orcutt1, Jonathan C. Leu1, Mark Wade2, Yu-Hsin Chen1, Kareem Nammari2, Xiaoxi Wang1, Hanqing Li1, Rajeev Ram1, Milos A. Popovic2, Vladimir Stojanovic1 Massachusetts Institute of Technology, Cambridge, MA, University of Colorado, Boulder, CO 1 2 Integrated photonic interconnect technology presents a disruptive alternative to electrical I/O for many VLSI applications. Superior bandwidth-density and energy-efficient operation can be realized through dense wavelength-division multiplexing (DWDM) and lower transmission losses. There are two main paths towards an integrated platform. Hybrid/heterogeneous designs [1-3] enable each component to be custom-tailored, but suffer from large packaging parasitics, increased manufacturing costs due to requisite process flows, and costly 3D integration or microbump packaging. Monolithic integration mitigates integration overheads, but has not penetrated deeply-scaled technologies due to

👥 作者与机构

Benjamin R. Moss1, Chen Sun1, Michael Georgas1, Jeff Shainline2,

分类:Wireline I/O · 年份:ISSCC 2013