A 14nm FinFET 128Mb 6T SRAM with VMINEnhancement Techniques for Low-Power Applications

📋 论文概要

该论文介绍了一款采用14nm FinFET工艺的128Mb 6T SRAM，通过多种VMIN增强技术（如读辅助、写辅助和位线预充电优化）显著降低了最低工作电压，从而实现了低功耗应用。解决了FinFET工艺下SRAM在低电压下稳定性与性能的权衡问题。

💡 主要创新点

• 提出了一种结合读辅助和写辅助的VMIN增强技术，有效降低了SRAM的最小工作电压。
• 采用了优化的位线预充电方案，进一步提升了低电压下的读写稳定性。
• 在14nm FinFET工艺上实现了128Mb容量，兼顾了高密度与低功耗。

🏷 关键词

📄 原文摘要

Jaeho Park, Sunghyun Park, Kang-Hyun Baek, Sanghoon Baek, Sang-Kyu Oh, Jinsuk Jung, Sungbong Kim, Gyuhong Kim, Jintae Kim, Youngkeun Lee, Kee Sup Kim, Sang-Pil Sim, Jong Shik Yoon, Kyu-Myung Choi Samsung Electronics, Yongin, Korea With the explosive growth of battery-operated portable devices, the demand for low power and small size has been increasing for system-on-a-chip (SoC). The FinFET is considered as one of the most promising technologies for future lowpower mobile applications because of its good scaling ability, high on-current, better SCE and subthreshold slope, and small leakage current [1]. As a key approach for low-power, supply-voltage (VDD) scaling has been widely used in SoC design. However, SRAM is the limiting factor of voltage-scaling, since all SRAM functions of read, write, and hold-stability are highly influenced by increased variations at low VDD, resulting in lower yield. In addition, the widthquantization property of FinFET device reduces the design window for

👥 作者与机构

Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang,