A 2.4GHz ADPLL with Digital-Regulated Supply-Noise-Insensitive and Temperature-Self-Compensated Ring DCO

📋 论文概要

提出一种2.4GHz全数字锁相环，采用数字调节的电源噪声不敏感和温度自补偿的环形DCO，解决了传统LDO功耗高、电压余量不足的问题。

💡 主要创新点

• 提出数字调节的电源噪声不敏感技术，无需LDO即可降低电源敏感性。
• 引入温度自补偿机制，提高环形DCO在不同温度下的频率稳定性。

🏷 关键词

📄 原文摘要

(RVCOs) ([oscillation frequency change %] / [VDD change %] typically lies in the range from 1 to 2 [1]), an LDO has to provide over 40dB power-supply-rejection ratio (PSRR) to maintain VCO phase noise. However, the voltage dropout of an LDO consumes extra power and voltage headroom, which is unacceptable in lowvoltage design. Moreover, the device noise from the LDO degrades the phasenoise performance. Recently published works [1-5] employ analog compensation techniques to lower supply sensitivity, and [2] incorporates a hybrid background calibration scheme for robustness. However, the additional current sources and active devices embedded in the oscillator [1-5] increase power and noise. In this work, a DCO with passive devices and all-digital calibration mitigates supply sensitivity under PVT variation, while maintaining

👥 作者与机构

Yi-Chieh Huang, Che-Fu Liang, Hsien-Sheng Huang, Ping-Ying Wang

MediaTek, Hsinchu, Taiwan Due to the high supply sensitivity of ring voltage-controlled oscillators