A 1GS/s 10b 18.9mW Time-Interleaved SAR ADC with Background Timing-Skew Calibration

📋 论文概要

该论文提出了一种1GS/s 10位时间交织SAR ADC，通过背景时序偏差校准技术解决了通道间时序偏差问题，实现了18.9mW的低功耗。

💡 主要创新点

• 提出了一种背景时序偏差校准技术，无需中断正常转换即可实时校正时序偏差。
• 采用时间交织SAR架构，在提高采样率的同时保持了高能效。

🏷 关键词

📄 原文摘要

SARs are one of the most energy-efficient ADC architectures for medium resolution and low-to-medium speed. To improve the limited bandwidth of SAR ADCs, the time-interleaved (TI) structure is often used [1,2]. However, TI ADCs have several issues caused by mismatches between channels, such as offset, gain, and timing-skew errors. Unlike the other errors, timing-skew causes errors that increase with input signal frequency. Considering that the TI structure is typically employed to increase bandwidth, timing-skew can be a dominant error source of TI ADCs. Recent works [1,3] have demonstrated a background timingskew calibration using a dedicated additional channel as a timing reference. In this work, we present a TI SAR ADC that enables background timing-skew calibration without a separate timing reference channel and enhances the conversion speed of each channel. Figure 22.4.1 shows the block diagram and timing waveform of the 8-way TI

👥 作者与机构

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

Massachusetts Institute of Technology, Cambridge, MA