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该论文介绍了一款14位4.6GS/s的射频数模转换器,采用0.18µm CMOS工艺,面向有线电视头端系统应用。通过低压晶体管保护等电路设计技巧,在高速下实现了高精度,解决了传统DAC在射频频率下的性能瓶颈。
Paul Kalthoff3, Ajay Kuckreja4, Geir Ostrem3 Maxim Integrated, North Chelmsford, MA, 2Maxim Integrated, Woodstock, GA, Maxim Integrated, Colorado Springs, CO, 4Maxim Integrated, Boulder, CO 1 the other input is driven to about 0.25V+Vgs. As a result, the sources of M1/M2, which connect to the drain of the cascode switch in Fig. 22.7.3, are biased at 1.8V while their drains are set to 3.3V–Vgs by M7/M8. Accordingly, M1/M2 can be faster low-voltage 180nm transistors since they are protected from the 3.3V supply during normal operation. To protect them during startup, shutdown, or an inactive clock, M5/M6 are turned on by a simple detector (not shown) whenever the supplies or bias currents are not valid or the clock is inactive. 3 Cable head-end systems typically employ multiple QAM modulator signal chains to synthesize the entire TV spectrum for triple-play services, resulting in high power, cost, and size. The DAC reported here can directly synthesize 160
Brian Brandt1, Dan McMahill2, Miaochen Wu1,