A 205mW 32Gb/s 3-Tap FFE/6-Tap DFE Bidirectional Serial Link in 22nm CMOS

📋 论文概要

该论文实现了一个32Gb/s的双向串行链路，采用3抽头前馈均衡（FFE）和6抽头判决反馈均衡（DFE），功耗仅205mW，解决了高带宽外设接口对高速率、低功耗通信的需求。

💡 主要创新点

• 首次在22nm CMOS工艺中实现32Gb/s双向串行链路，结合3抽头FFE和6抽头DFE均衡技术。
• 通过电路架构优化实现205mW的低功耗，满足移动平台对能效的严格要求。

🏷 关键词

📄 原文摘要

Tzu-Chien Hsueh1, Tawfiq Musah1, Gokce Keskin1, Sudip Shekhar1,*, Joseph Kennedy1, Shreyas Sen1, Rajesh Inti1, Mozhgan Mansuri1, Michael Leddige1, Bryce Horine1, Clark Roberts1, Randy Mooney2, Bryan Casper1 Intel, Hillsboro, OR, 2Intel, Mapleton, UT *now with University of British Columbia, Vancouver, Canada 1 Peripheral I/O data-rates for PCs and mobile computing platforms continue to scale to meet high-bandwidth applications including high-resolution displays and large-capacity external storage. The bandwidth requirements will soon exceed the data-rates of current standards such as PCI Express and USB. A lowpower low-cost serial link is needed for the next-generation peripheral interface that can scale to 32Gb/s per lane. Recent publications have demonstrated 28 to 32Gb/s rates [1-2]. However, the circuit power and channel characteristics are not suitable for mainstream PC and mobile markets. A low-profile connector and

👥 作者与机构

James Jaussi1, Ganesh Balamurugan1, Sami Hyvonen1,