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ISSCC 2014Session 26 · ENERGY-EFFICIENT DENSE INTERCONNECTSOther

An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-Tap ImpedanceModulated Voltage-Mode Transmitter with Fast Power-State Transitioning in 65nm CMOS

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📋 论文概要

该论文提出了一种8至16Gb/s、0.65至1.05pJ/b的2抽头阻抗调制电压模式发射机,通过模拟控制均衡器抽头实现阻抗调制,解决了高速串行链路中低功耗均衡和快速功率状态转换的问题。

💡 主要创新点

核心指标
8-16Gb/s数据率,0.65-1.05pJ/b能效
重要性
发表年份
ISSCC 2014

🏷 关键词

电压模式发射机阻抗调制均衡器低功耗串行链路

📄 原文摘要

per-channel data-rates and energy efficiency to meet projected system bandwidth demands. These constraints necessitate the design of ultra-low-power serial-link transmitters that can efficiently incorporate equalization to compensate for channel losses, while enabling fast power-state transitioning to leverage dynamic power scaling. In this work, a scalable-data-rate voltage-mode transmitter is presented that introduces two main innovations. First, an impedance-modulated 2-tap equalizer is adopted that employs analog control of the equalizer taps, thereby obviating output driver segmentation. Second, fast power-state transitioning is achieved using a replica-biased voltage regulator to power the output stages of multiple

👥 作者与机构

Young-Hoon Song1, Hae-Woong Yang1, Hao Li2, Patrick Yin Chiang2,3, Samuel Palermo1

Texas A&M University, College Station, TX, Oregon State University, Corvallis, OR, 3 Fudan University, Shanghai, China 1 2 Future processor I/Os must aggressively improve

分类:Other · 年份:ISSCC 2014