A 2.667Gb/s DDR3 Memory Interface with Asymmetric ODT on Wirebond Package and Single-Side-Mounted PCB

📋 论文概要

本文提出了一种采用非对称片上端接（Asymmetric ODT）技术的DDR3内存接口，在引线键合封装和单面安装PCB上实现了2.667Gb/s的数据速率。通过放宽对电源完整性和外部环境的要求，降低了封装和PCB的设计成本。

💡 主要创新点

• 提出非对称ODT技术，优化了引线键合封装和单面PCB的信号完整性，支持高速DDR3操作。
• 通过放宽系统设计约束，降低了封装尺寸和PCB面积，从而降低系统成本。

🏷 关键词

📄 原文摘要

external environments, such as chip package type and system board design. In order to guarantee the system performance, IP providers often define the package and PCB design constraints to reduce product risks [1]. These design constraints may increase the package size and DDR3 PCB area to cost, increasing the whole system cost. Therefore, our DDR3 memory I/F design addresses this problem, relaxing the external environment requirements, especially relating to power integrity, and achieves 2.667Gb/s operation in a wirebond package and singleside mounted PCB. The difference between double-side and single-side mounted PCB is shown in Fig. 26.6.1. The capacitor on the PCB cannot be mounted directly near the SOC on the back side of PCB. This external environment

👥 作者与机构

Shang-Pin Chen, Chih-Chien Hung, Qui-Ting Chen, Sheng-Ming Chang,

Ming-Shi Liou, Bo-Wei Hsieh, Hsiang-I Huang, Brian Liu, Yan-Bin Luo MediaTek, Hsinchu, Taiwan DDR3 memory interface (I/F) with single-end signals is very sensitive to