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ISSCC 2014Session 27 · ENERGY-EFFICIENT DIGITAL CIRCUITSDigital Circuits

A 0.75-Million-Point Fourier-Transform Chip for Frequency-Sparse Signals

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📋 论文概要

该论文提出一款面向频率稀疏信号的75万点傅里叶变换芯片,利用信号稀疏性降低计算复杂度和功耗,解决了大尺寸FFT ASIC实现的面积和功耗挑战。适用于频谱感知、雷达信号处理等应用。

💡 主要创新点

重要性
发表年份
ISSCC 2014

🏷 关键词

稀疏FFT频率稀疏信号大尺寸傅里叶变换ASIC

📄 原文摘要

Dina Katabi, Anantha P. Chandrakasan, Vladimir Stojanovic Massachusetts Institute of Technology, Cambridge, MA Applications like spectrum sensing, radar signal processing, and pattern matching by convolving a signal with a long code, as in GPS, require large FFT sizes. ASIC implementations of such FFTs are challenging due to their large silicon area and high power consumption. However, the signals in these applications are sparse, i.e., the energy at the output of the FFT/IFFT is concentrated at a limited number of frequencies and with zero/negligible energy at most frequencies. Recent advances in signal processing have shown that, for such sparse signals, a new algorithm called the sparse FFT (sFFT) can compute the Fourier transform more efficiently than traditional FFTs [1]. This paper presents a VLSI implementation of the sFFT algorithm. The chip implements a 746,496-point sFFT, in 0.6mm2 of silicon area. At 0.66V, it

👥 作者与机构

Omid Abari, Ezz Hamed, Haitham Hassanieh, Abhinav Agarwal,

分类:Digital Circuits · 年份:ISSCC 2014