⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种静态无竞争的单相时钟24T触发器，旨在解决近阈值电压下数字电路能效停滞的问题。该触发器在45nm工艺下实现，适用于低功耗应用，能在宽电压范围内可靠工作。
solution to stagnating energy efficiencies in digital integrated circuits, arising from slowed voltage scaling in nanometer CMOS [1-2]. The design of sequential elements for NTC, as well as in voltage-scaled systems operating at both near-threshold and super-threshold, has not been extensively studied. However, it is well known that sequential elements have a strong sensitivity to process variations in NTC [2], which can have a significant impact on system yield and power consumption. In order to achieve reliable energy-efficient operation across a wide operating voltage range, a flip-flop should have the following attributes: 1) static operation, since dynamic nodes are highly susceptible to PVT variations at low voltage; 2) contention-free transitions, since ratioed logic has poor robustness across the wide range of
Yejoong Kim, Wanyeong Jung, Inhee Lee, Qing Dong,
Michael Henry, Dennis Sylvester, David Blaauw University of Michigan, Ann Arbor, MI Near-threshold computing (NTC) is an attractive