Ivytown: A 22nm 15-Core Enterprise Xeon® Processor Family

📋 论文概要

该论文介绍了基于22nm三栅极工艺的15核企业级Xeon处理器家族Ivytown，采用双线程64位Ivybridge核心和37.5MB共享L3缓存。通过环形总线设计和灵活的系统拓扑支持，实现了从40W到150W的宽功耗范围和1.4GHz至3.8GHz的频率覆盖，满足了多样化产品需求。

💡 主要创新点

• 采用22nm高κ金属栅极三栅极CMOS工艺，集成4.31B晶体管，在功耗和性能间取得平衡。
• 通过环形总线优化布局和延迟，支持15核与37.5MB共享L3缓存的高效互连。
• 支持多种系统拓扑和宽TDP范围（40-150W），实现从低功耗到高性能的灵活产品配置。

🏷 关键词

📄 原文摘要

dual-threaded 64b Ivybridge cores [1] and 37.5MB shared L3 cache. The system interface includes two on-chip memory controllers, each with two memory channels and supports multiple system topologies. The processor has 4.31B transistors in a high-κ metal-gate tri-gate 22nm CMOS technology with 9 metal layers [2]. The design supports a wide array of product offerings with thermal design power ranging from 40 to 150W and frequencies ranging from 1.4 to 3.8GHz. Fig. 5.4.1(a) shows the processor block diagram. The floorplan (Fig. 5.4.1(b)) is driven by the ring bus routability and latency, as well as the chop requirements to smaller core counts. The cores and associated L3 cache are organized in columns of five, with the ring bus segment embedded. The fully populated die

👥 作者与机构

Stefan Rusu, Harry Muljono, David Ayers, Simon Tam, Wei Chen,

Aaron Martin, Shenggao Li, Sujal Vora, Raj Varada, Eddie Wang Intel, Santa Clara, CA The next-generation enterprise Xeon® server processor has 15