A Graphics Execution Core in 22nm CMOS

📋 论文概要

论文提出了一种在22nm CMOS工艺中实现的图形执行核心，采用了自适应时钟、选择性升压和状态保持睡眠等电路技术，实现了从低电压高效运行到高性能需求的动态调整，解决了功耗与性能的平衡问题。

💡 主要创新点

• 自适应时钟技术，根据工作负载动态调整时钟频率，以优化能效。
• 选择性升压技术，在需要高性能时局部提升电压，而其他部分保持低电压。
• 状态保持睡眠技术，在睡眠模式下保持电路状态，实现快速唤醒并降低功耗。

🏷 关键词

📄 原文摘要

Carlos Tokunaga, Joseph F. Ryan, Charles Augustine, Jaydeep P. Kulkarni, Yi-Chun Shih, Stephen T. Kim, Rinkle Jain, Keith Bowman, Arijit Raychowdhury, Muhammad M. Khellah, James W. Tschanz, Vivek De Intel, Hillsboro, OR The demand for high-performance graphics capability even in extremely power-constrained platforms such as smartphones and tablets requires circuit techniques that scale from efficient operation at low voltage to high performance when needed. It is well known that energy efficiency improves as supply voltage is scaled down, reaching a maximum near the device threshold voltage where switching energy savings from voltage reduction is balanced by increased leakage energy from frequency loss. Achieving this voltage reduction, however, requires techniques that address intrinsic VMIN limitations in arrays (SRAM, register file arrays, ROMs), voltage droop guardband reduction in logic, as well

👥 作者与机构

Featuring Adaptive Clocking, Selective Boosting, and State-Retentive Sleep