A 3GHz 64b ARM v8 Processor in 40nm Bulk CMOS Technology

📋 论文概要

该论文提出了一款基于40nm Bulk CMOS工艺、主频达3GHz的64位ARM v8处理器Potenza，用于X-Gene服务器平台。通过模块化设计（PMD）实现可扩展性，每个PMD包含两个核心和256KB L2缓存，功耗为4.5W，解决了服务器级高性能与低功耗的平衡问题。

💡 主要创新点

• 首次实现64位ARM v8架构的服务器级处理器，支持3GHz高频运行。
• 采用可扩展的模块化设计（PMD），每个模块集成双核与L2缓存，便于不同服务器配置复用。

📄 原文摘要

John Ngai, Russ Homer, Matthew Ashcraft, Greg Favor Applied Micro, Sunnyvale, CA Potenza is a first generation 64b ARM v8 processor and memory sub-system of the X-GeneTM server platform [1]. The Potenza processor module (PMD) is an integrated design unit, comprising two identical cores sharing a 256KB L2 cache, and is designed to be scalable for different server configurations. Each PMD contains 84 million transistors, occupying over 14.8mm2, and averages 4.5W under representative workloads. The initial platform is configured with 4 PMDs, a shared 8MB L3 cache, and 4 DRAM channels arranged around a central switch. Potenza can operate up to 3GHz at 0.9V supply and is fabricated in a 40nm bulk CMOS technology using 10 metal layers (Fig. 5.8.7). Each core of the PMD features a four-wide, out-of-order superscalar micro-architecture. Execution units are crafted with pipeline designs for concurrent handling of one load, one store, two integer, as well as multiple

👥 作者与机构

Alfred Yeung, Hamid Partovi, Qawi Harvard, Luca Ravezzi,