⚡ 本页包含 AI 生成的分析内容，仅供参考
本文针对下一代400Gb/s及以上网络线卡的内存系统瓶颈，提出专门架构和设计以提升随机事务速率(RTR)。分析了网络线卡速率翻倍对内存系统的要求，并给出了系统级解决方案。
and limited by the Random Transaction Rate (RTR) of the memory system. Networking line cards to date are ≤200Gb/s and were able to use memories optimized for latency (SRAM) and bandwidth (SDRAM) designed for computing systems. Next generation line cards are ≥400Gb/s and the memory system for these line cards need to be explicitly architected and designed for delivering the required high RTR. Networking line card packet rate approximately doubles from one generation to next while scaling the functional features proportionally. This requires that not only the RTR of the memory system doubles but also the density doubles from one generation to next. RTR is doubling at a faster pace than the corresponding compute metric (latency). Similarly, networking memory density is doubling at a faster pace than compute cache density. Networking routers and switches (Fig. 6.1.1) deal with a sequence of random
Cypress Semiconductor, San Jose, CA, Networking relies on fast line card packet rates that are directly proportional to