A 7.5mW 7.5Gb/s Mixed NRZ/Multi-Tone Serial-Data Transceiver for Multi-Drop Memory Interfaces in 40nm CMOS

📋 论文概要

该论文提出一种混合NRZ/多音调串行数据收发器，用于多分支内存接口，在40nm CMOS工艺下实现7.5mW功耗和7.5Gb/s数据率，解决了多分支总线中的带宽和功耗挑战。

💡 主要创新点

• 提出混合NRZ与多音调调制方案，结合两种信号优势以提升多分支信道下的数据率。
• 设计低功耗收发器架构，通过优化电路和信号处理技术，在满足7.5Gb/s速率的同时仅消耗7.5mW功率。
• 针对多分支内存接口的特殊信道特性，采用多音调信号改善信号完整性并降低均衡复杂度。

🏷 关键词

📄 原文摘要

Advancements in CMOS technology have enabled exponential growth of computational power. However, data processing efficiency also relies on sufficient data communication bandwidth between different units of a computing system. Memory systems typically apply dual in-line memory modules (DIMMs) because of their high capacity and low cost. However, the multi-drop bus (MDB) interface between these units and the controller is challenging for bandwidth and power reasons. Multi-tone signaling has promising characteristics for this type of interface [1]. To keep up with the ever growing demand for higher bandwidth in multi-drop buses, we develop a 7.5Gb/s (3.75Gb/s/pin) NRZ/multi-tone (NRZ/MT) transceiver with a total link power efficiency of 1mW/Gb/s. The main idea presented in this paper is to apply a modulation scheme that matches the transmitted spectrum well to the channel frequency response and

👥 作者与机构

Kiarash Gharibdoust1, Armin Tajalli1,2, Yusuf Leblebici1

EPFL, Lausanne, Switzerland, 2Kandou Bus, Lausanne, Switzerland