A Wideband Fractional-N Ring PLL Using a NearGround Pre-Distorted Switched-Capacitor Loop Filter

📋 论文概要

本文提出了一种使用近地预失真开关电容环路滤波器的宽带分数N环形PLL，解决了在低电源电压下相位插值器线性度和噪声受限的问题。通过相关双采样技术，该滤波器有效维持了电荷泵的输出性能，实现了低抖动和精细频率分辨率。

💡 主要创新点

• 提出近地预失真开关电容环路滤波器，替代传统相位插值器进行量化噪声消除，改善了低电压下的线性度。
• 采用相关双采样技术，保持电荷泵输出稳定性，降低噪声。

🏷 关键词

📄 原文摘要

Ring PLLs play an important role in mobile baseband applications. In cases where fine frequency resolution and low jitter are both needed, wideband fractional-N PLL architectures with quantization noise (Q-noise) cancellation are preferred. Phase interpolators (PI) are widely used in recent literature [1-3]. Although the Q-noise is reduced, decreasing supply voltages severely limit the linearity and noise of PI. In this paper, we present a switched-capacitor loop filter (SCLF) to solve this problem. The developed SCLF with correlated double sampling (CDS) keeps the output of the charge pump (CP) near-ground to improve its noise, linearity, and power-supply rejection ratio (PSRR). Furthermore, a calibrated 2b ADC is used to realize type-II operation. The architecture of this PLL is shown in Fig. 10.8.1. It consists of a phase frequency detector (PFD), a CP, an SCLF, a 2b ADC, a hybrid VCO, a timing generator (TGEN), a multi-modulus divider (MMD), and two digital blocks. The first

👥 作者与机构

Che-Fu Liang, Ping-Ying Wang

MediaTek, Hsinchu, Taiwan