← 返回论文列表 📄 下载原文 PDF  ISSCC 2015 · 14.2
ISSCC 2015Session 14 · DIGITAL PLLS AND SOC BUILDING BLOCKSDigital Processors40nm CMOS

A Physically Unclonable Function with BER <10-8 for Robust Chip Authentication Using Oscillator Collapse in 40nm CMOS

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

该论文提出了一种基于振荡器崩溃的物理不可克隆函数(PUF),在40nm CMOS工艺中实现了低于10^-8的误码率(BER),用于鲁棒的芯片认证。通过利用振荡器崩溃现象,该PUF能够生成唯一且稳定的芯片响应,解决了传统PUF在环境变化下可靠性低的问题。

💡 主要创新点

核心指标
BER < 10^-8
工艺节点
40nm CMOS
重要性
发表年份
ISSCC 2015

🏷 关键词

物理不可克隆函数芯片认证振荡器崩溃误码率40nm CMOS

📄 原文摘要

Security is a key concern in today’s mobile devices and a number of hardware implementations of security primitives have been proposed, including true random number generators, differential power attack avoidance, and chip-ID generators [1-4]. Recently, physically unclonable functions (PUFs) were proposed as a secure method for chip authentication in unsecure environments [5-7]. A PUF is a function that maps an input code (“challenge”) to an output code (“response”) in a manner that is unique for every chip. PUFs are increasingly used for IC authentication to offer protection against identity theft, cloning, and counterfeit components [2-4]. Conventional authentication methods using secret keys, digital signatures, and encryption have high computational expense and are vulnerable to tampering

👥 作者与机构

Kaiyuan Yang, Qing Dong, David Blaauw, Dennis Sylvester

University of Michigan, Ann Arbor, MI

分类:Digital Processors · 年份:ISSCC 2015