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ISSCC 2015Session 14 · DIGITAL PLLS AND SOC BUILDING BLOCKSDigital Processors28nm CMOS

An All-Digital Power-Delivery Monitor for Analysis of a 28nm Dual-Core ARM Cortex-A57 Cluster

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

该论文提出了一种全数字电源传输监测器,用于分析28nm双核ARM Cortex-A57集群中的交流电源噪声问题,旨在解决高电流密度和电源约束下的系统可靠性挑战。

💡 主要创新点

工艺节点
28nm CMOS
重要性
发表年份
ISSCC 2015

🏷 关键词

全数字监测器电源传输ARM Cortex-A57交流噪声28nm

📄 原文摘要

ARM, Cambridge, United Kingdom The current trend for System-on-Chip (SoC) compute subsystems is to improve energy efficiency, while operating at a similar power budget as previous generations. Reduced supply voltages and increased transistor density affords SoCs composed of multiple clusters of CPUs and additional specialized compute engines. However, this comes at the cost of both increasing current, and increasing current density, to the extent that these systems are ultimately constrained by power delivery. Pathological AC supply noise conditions may arise due to sporadic combinations of system and micro-architectural events, and these effectively limit the energy efficiency of the system, as sufficient voltage margin must be deployed to guarantee these conditions do not result in system failure. Characterization of on-chip AC supply voltage noise is challenging because the most severe supply voltage droops tend to be triggered by complex interactions

👥 作者与机构

Paul N. Whatmough, Shidhartha Das, Zacharias Hadjilambrou, David M. Bull

分类:Digital Processors · 年份:ISSCC 2015