An 85dB-DR 74.6dB-SNDR 50MHz-BW CT MASH ΔΣ Modulator in 28nm CMOS

📋 论文概要

该论文提出了一种采用28nm CMOS工艺的连续时间(CT)多级噪声整形(MASH)ΔΣ调制器，实现了85dB动态范围、74.6dB SNDR和50MHz带宽。针对传统MASH架构中模拟与数字传输函数不匹配导致的量化噪声泄露问题，采用CT SMASH架构有效避免了该问题，在保持稳定性的同时提升了性能。

💡 主要创新点

• 首次在连续时间域实现SMASH(MASH)结构，解决了DT SMASH在CT实现中的挑战，避免了量化噪声泄露。
• 通过优化的环路滤波器和量化器设计，在28nm CMOS工艺下达到了85dB DR和74.6dB SNDR的高性能指标，同时实现了50MHz的宽带宽。

🏷 关键词

📄 原文摘要

MediaTek, Woburn, MA 1 2 A multi-stage noise-shaping (MASH) architecture is an attractive approach for its aggressive noise-shaping capability and relaxed stability requirements. However, in practice the quantization noise leakage associated with the mismatch between analog and digital transfer functions degrades performance significantly. The discrete-time (DT) Sturdy-MASH (SMASH) architecture avoids this problem, and promises a higher performance potential [1]. Although straightforward in DT implementation, the SMASH architecture poses challenges in continuous-time (CT) implementation demanded by high-bandwidth applications. This paper presents a 3-1 CT MASH ΔΣ modulator to address these challenges. The modulator is clocked at 1.8GHz and achieves 85dB DR, 85.2dBc SFDR, and 74.6dB SNDR at a 50MHz BW. The first challenge is the extraction of the first loop’s quantization noise (E1), without the input signal (Y) to the first quantizer (Q1). Figure 15.1.1 shows a

👥 作者与机构

Do-Yeon Yoon1, Stacy Ho2, Hae-Seung Lee1

Massachusetts Institute of Technology, Cambridge, MA,