A 4.5mW CT Self-Coupled ΔΣ Modulator with 2.2MHz BW and 90.4dB SNDR Using Residual ELD Compensation

📋 论文概要

本文提出了一种采用自耦合噪声注入技术和残余ELD补偿的连续时间ΔΣ调制器，实现了4.5mW功耗、2.2MHz带宽和90.4dB SNDR，解决了高分辨率低功耗设计中架构复杂度和面积问题。

💡 主要创新点

• 采用自耦合噪声注入技术，在不增加额外有源滤波器的情况下提升调制器动态范围。
• 提出残余ELD（Excess Loop Delay）补偿方法，有效补偿环路延迟，提高稳定性。

🏷 关键词

📄 原文摘要

front-end filter design for wireless communication applications. To achieve high resolution (DR>90dB) and low power dissipation (FoMs>170dB), architecture selection and circuit techniques are the main design issues. In [1], a CT ΔΣ modulator embedded with a 2nd-order active filter and VGA is reported to extend the DR. However, the additional active filter results in a complicated architecture as well as extra area that is not preferred in advanced processes. An alternative method that improves the DR is to adopt the self-coupled noise-injection technique introduced in [2] to increase by one the order of the noise transfer function (NTF). Unfortunately, it requires an accurate clock cycle delay, which is only available in the DT ΔΣ modulator. Apart from DR considerations, power efficiency is still limited by the building block desig

👥 作者与机构

Chen-Yen Ho1, Cong Liu2, Chi-Lun Lo1, Hung-Chieh Tsai1,

Tze-Chien Wang1, Yu-Hsin Lin1 MediaTek, Hsinchu, Taiwan, 2MediaTek, Hefei, China 1 A high-dynamic-range (DR) CT ΔΣ modulator is required to relax the analog