A 12b 250MS/s Pipelined ADC with Virtual Ground Reference Buffers

📋 论文概要

本文提出了一种12位250MS/s的流水线ADC，采用虚拟地参考缓冲器（Virtual Ground Reference Buffer）技术，解决了传统高速高精度流水线ADC中运算放大器功耗过高的问题。该设计在不依赖数字校准的情况下，实现了低功耗高性能的模数转换。

💡 主要创新点

• 提出虚拟地参考缓冲器技术，取代传统高功耗运算放大器，降低功耗并保持精度。
• 通过虚拟地参考缓冲器实现高速高线性度采样保持与级间增益，简化电路设计。

🏷 关键词

📄 原文摘要

High-performance op-amps in a switched-capacitor pipelined ADC consume high power to meet accuracy and speed requirements. This is aggravated by the decrease in intrinsic transistor gain and voltage headroom in nanoscale CMOS. Developments in pipelined ADCs have taken many unique directions to address these issues. Digital calibration of nonlinearity has enabled the use of lowperformance op-amps [1]. Non-op-amp-based approaches, such as zerocrossing-based circuits (ZCBC) [2], the pulsed bucket brigade (PBB) [3], and the ring amplifier (RA) [4], have also been explored. This work presents a virtual ground reference buffer approach to significantly relax key op-amp specifications including unity-gain bandwidth, noise, and open-loop gain. Since the op-amp is allowed to settle fully, calibration to remove charge-transfer error in PBB and low gain or non-settling op-amp-based circuits is unnecessary. Also

👥 作者与机构

Hyun H. Boo, Duane S. Boning, Hae-Seung Lee

Massachusetts Institute of Technology, Cambridge, MA