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该论文提出了一种采用0.13μm SiGe BiCMOS工艺的四通道25.78Gb/s重定时器IC，用于光链路。它解决了多通道高速光链路中无需外部时钟的重定时问题，通过集成参考时钟-less的时钟数据恢复（CDR）电路，实现了高密度、低功耗的收发器。
power, high-density, multilane links with a data rate exceeding 25Gb/s/lane are needed. An optical transceiver with a retiming capability would significantly enhance the usability of the link by extending the reach. Such optical transceivers should operate without an external clock source since a small form factor is imperative. The optical link we develop has a four-lane configuration that consists of an electrical-to-optical (E/O) converter and an optical-to-electrical (O/E) convertor (Fig. 22.7.1). Both the E/O and O/E convertors are equipped with a per-lane reference-less clock-and-data recovery (CDR) circuit that enables independent operation of each lane. The transceiver pitch is 250μm/lane, which matches the fiber pitch of
Takayuki Shibasaki, Yukito Tsunoda, Hideki Oku, Satoshi Ide,
Toshihiko Mori, Yoichi Koyanagi, Kazuhiro Tanaka, Tomohiro Ishihara, Hirotaka Tamura Fujitsu Laboratories, Kawasaki, Japan To meet increasing demands for server computational