A 1mW 71.5dB SNDR 50MS/s 13b Fully Differential Ring-Amplifier-Based SAR-Assisted Pipeline ADC

📋 论文概要

本文提出一种基于全差分环形放大器的SAR辅助流水线ADC，解决了传统流水线ADC中功耗高、输出摆幅受限的问题。在1mW功耗下实现了71.5dB SNDR和50MS/s采样率，具有高能效特性。

💡 主要创新点

• 采用全差分环形放大器作为残差放大器，替代传统功耗高的telescopic放大器，实现低功耗且高输出摆幅。
• 将环形放大器与SAR辅助流水线架构结合，在保持高分辨率的同时显著提升能效。
• 在1mW功耗下达到71.5dB SNDR和13位分辨率，展示了环形放大器在高速ADC中的潜力。

🏷 关键词

📄 原文摘要

The SAR-assisted pipeline ADC is an energy-efficient architecture for high resolution [1]. Consisting of two low-resolution charge-redistribution SAR ADCs coupled by a residue amplifier, a SAR-assisted pipeline ADC relaxes the noise requirements of the second stage and enhances the overall ADC speed while maintaining excellent power efficiency [1-4]. However, designs reported in [1,2] rely on power-hungry telescopic amplifiers that also limit the available inter-stage residue gain due to low output swing. A lower-power alternative is a dynamic amplifier, which operates as an open-loop time-domain integrator [3,4]. Although time-domain integration provides the benefit of noise filtering, the calibration required to achieve an accurate residue gain increases design complexity and test cost, and limits robustness. We introduce an uncalibrated fully differential ring-amplifier-based 13b 50MS/s rail-to-rail input swing

👥 作者与机构

Yong Lim1,2, Michael P. Flynn1

University of Michigan, Ann Arbor, MI, 2Samsung Electronics, Yongin, Korea