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本文介绍了Oracle SPARC M7处理器，采用20nm工艺集成32个S4核心和64MB L3缓存，通过引入应用数据完整性、低延迟高吞吐片上网络和数据库分析加速器等特性，实现了相比前代SPARC M6超过3倍的商业应用吞吐性能提升。
Francis Schumacher, Venkat Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister Oracle, Redwood Shores, CA The SPARC M7 processor delivers more than 3× throughput performance improvement over its predecessor SPARC M6 for commercial applications. It introduces new design features, such as the S4 core, a 64MB L3 cache subsystem with application data integrity, a low-latency, high-throughput on-chip network (OCN), a database analytic accelerator (DAX), fine-grain adaptive power management and 1.5× higher SerDes I/O bandwidth for memory, coherency and system interfaces (Fig. 4.2.1) [1]. The enhancements in the S4 core over the S3 core [2] include a new L2 cache scheme, support for visual instruction set (VIS) extensions, virtual address masking and user-level synchronization instructions
Penny Li, Jinuk Luke Shin, Georgios Konstadinidis,