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该论文介绍了AMD的下一代移动加速处理单元（APU）Carrizo，它集成了四个Excavator处理器核心和八个Radeon图形核心，采用28nm HKMG平面双栅氧化层FET工艺，旨在优化功耗和面积效率。
Jim Farrell1, Dave Johnson2, Guhan Krishnan1, Hugh McIntyre3, Edward McLellan1, Samuel Naffziger2, Russell Schreiber4, Sriram Sundaram4, Jonathan White1 AMD, Boxborough, MA, 2AMD, Fort Collins, CO, 3 AMD, Sunnyvale, CA, 4AMD, Austin, TX 1 Carrizo (CZ, Fig. 4.8.7) is AMD’s next-generation mobile performance accelerated processing unit (APU), which includes four Excavator (XV) processor cores and eight Radeon™ graphics core next (GCN) cores, implemented in a 28nm HKMG planar dual-oxide FET technology featuring 3 Vts of thin-oxide devices and 12 layers of Cu-based metallization. This 28nm technology is a density-focused version of the 28nm technology used by Steamroller (SR) [1] featuring eight 1× metals for dense routing, one 2× and one 4× for low-RC routing and two 16× metals for power distribution. At 250.04mm2, CZ fits 29% more transistors (3.1 billion) into a die with approximately the same area footprint as the Kaveri APU (KV) [2]. Excluding the
Kathryn Wilcox1, David Akeson1, Harry R. Fair III1,