A 24.7mW 45MHz-BW 75.3dB-SNDR SARAssisted CT ΔΣ Modulator with 2nd-Order Noise Coupling in 65nm CMOS

📋 论文概要

该论文提出了一种SAR辅助的连续时间ΔΣ调制器，采用二阶噪声耦合技术，在65nm CMOS工艺下实现了45MHz带宽和75.3dB SNDR，功耗仅24.7mW。解决了低过采样率下宽带宽与调制器稳定性之间的矛盾。

💡 主要创新点

• 采用异步SAR量化器替代传统flash量化器，显著提高能效。
• 引入二阶噪声耦合技术，在低过采样率下实现更激进的噪声整形，同时保持调制器稳定性。
• 结合连续时间与离散时间噪声耦合技术，优化了带宽与功耗的折中。

🏷 关键词

📄 原文摘要

Technology advancement has recently made it attractive to replace the flash quantizer (QTZ) in a multibit ΔΣ modulator by an asynchronous successiveapproximation-register (ASAR) QTZ to improve the overall power efficiency [1]. However, limited by the SAR throughput, most works in this regime report only a small signal bandwidth. To achieve a wide bandwidth, a lower oversampling ratio (OSR) can be utilized, which dictates more aggressive noise shaping for a constant SNDR, and thus can potentially compromise the stability of the modulator. A discrete-time (DT) noise-coupling (NC) technique [2] circumvents this problem and is suitable for deployment in an SAR-assisted multibit ΔΣ modulator. In a switched-capacitor SAR, the quantization error (Eq) is naturally produced on the summing node at the end of the SAR bit cycles and can be buffered and injected back into the loop filter (LF) to facilitate NC. In addition, the

👥 作者与机构

Bo Wu, Shuang Zhu, Benwei Xu, Yun Chiu

University of Texas, Dallas, TX