← 返回论文列表 📄 下载原文 PDF  ISSCC 2016 · 15.2
ISSCC 2016Session 15 · OVERSAMPLING DATA CONVERTERSData Converters

A 2.2GHz Continuous-Time ΔΣ ADC with -102dBc THD and 25MHz BW

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

本文提出一款2.2GHz连续时间ΔΣ模数转换器,实现了-102dBc的总谐波失真和25MHz带宽,适用于汽车收音机等宽频射频前端,满足高动态范围和线性度的需求。该设计无需滤波器即可直接连接射频前端,降低系统复杂性和干扰。

💡 主要创新点

核心指标
2.2GHz采样率, 25MHz带宽, -102dBc THD
重要性
发表年份
ISSCC 2016

🏷 关键词

连续时间ΔΣ ADC高线性度总谐波失真宽带ADC汽车收音机

📄 原文摘要

Shagun Bajoria1, Jan Niehof1, Robert Rutten1, Bert Oude-Essink2, Franco Fritschij2, Jagdip Singh2, Gerard Lassche2 NXP Semiconductors, Eindhoven, The Netherlands, Catena Microelectronics, Delft, The Netherlands 1 2 The trend towards wideband radio front-ends (RFE) for car radio receivers allows for digital tuning and channel filtering, simultaneous reception of multiple channels and reduced interference. A filter-less RFE requires a high dynamic range and very linear analog-to-digital converter (ADC). For AM/FM, typical total harmonic distortion (THD), intermodulation distortion and spurious tone levels of the ADC must be below -100dBc. These nonlinearity levels are much lower than the required ADC noise that is necessary to maintain high reception quality of a weak wanted signal in the presence of strong unfiltered interferers. Such audio-like linearity performance has been demonstrated for low input signal

👥 作者与机构

Lucien Breems1, Muhammed Bolatkale1, Hans Brekelmans1,

分类:Data Converters · 年份:ISSCC 2016