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本文提出了一种22.3位、1kHz带宽、12.7mW功耗的开关电容ΔΣ调制器，通过堆叠分裂-引导放大器技术实现。通过三种独立的功率优化技术（基于分裂采样电容）显著提升了分辨率与能效。
West Silicon EURL, Hottot les Bagues, France 1 2 Efforts to improve the resolution and power-efficiency of ADCs continue unabated, as is well documented in [2]. Although the number of new switchedcapacitor (SC) ADC publications has declined over the years in favor of continuous-time designs, these circuits still remain attractive owing to their superior immunity to clock jitter and process variations. In this paper, we present three independent power optimization techniques realized by splitting the sampling capacitors, which are implemented in the first stage of the single-bit SC ΔΣ modulator shown in Fig. 15.8.1. A frequently used SC amplifier is the telescopic OTA. However, its slewing current is limited by the bias current, current mirrors contribute noise in addition to that of the amplifying transistors, and the gm efficiency is low given that there is only one amplifying transistor per current branch. Nevertheless, results have
Matthias Steiner1, Nigel Greer2
ams AG, Unterpremstaetten, Austria,