A 10nm FinFET 128Mb SRAM with Assist

📋 论文概要

本文提出了一种在10nm FinFET工艺下实现的128Mb SRAM，通过辅助调整系统优化功耗、性能和面积。该系统解决了先进工艺节点下SRAM最小工作电压（VMIN）因变异性增加而难以降低的问题，平衡了位单元的可写性和稳定性。

💡 主要创新点

• 提出了一种辅助调整系统，动态优化SRAM的功耗、性能和面积，降低VMIN。
• 在10nm FinFET工艺中实现了128Mb高密度SRAM，通过调整技术提升良率和可靠性。

🏷 关键词

📄 原文摘要

Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Jonghoon Jung, Giyong Yang, Sanghoon Baek, Jaeseung Choi, Bongjae Kwon, Yunwoo Lee, Sungbong Kim, Gyuhong Kim, Hyo-Sig Won, Ja-Hum Ku, Sunhom Steve Paak, ES Jung, Steve Sungho Park, Kinam Kim Samsung Electronics, Hwaseong, Korea The power consumption of a mobile application processor (AP) is strongly limited by the SRAM minimum operating voltage, VMIN [1], since the 6T bit cell must balance between write-ability and bit cell stability. However, the SRAM VMIN scales down gradually with advanced process nodes due to increased variability. This is evident with the quantized device-width and limited process-knobs of a FinFET technology, which has greatly affected SRAM design [2-4]. Therefore, assistcircuits are more crucial in a FinFET technology to improve VMIN, which in turn adds to the Power, Performance, and Area (PPA) gain of SRAM. Examples in recent literature have demonstrated various assist circuits that control

👥 作者与机构

Adjustment System for Power, Performance, and Area Optimization