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ISSCC 2016Session 20 · RF-to-THz TRANSCEIVER TECHNIQUESRF & Wireless65nm CMOS

An 86-to-94.3GHz Transmitter with 15.3dBm Output Power and 9.6% Efficiency in 65nm CMOS

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📋 论文概要

本文设计了一种工作在86-94.3GHz W波段的CMOS发射机,采用65nm工艺实现了15.3dBm输出功率和9.6%的效率,解决了高频段功率与效率的权衡问题,适用于成像和雷达系统。

💡 主要创新点

核心指标
输出功率15.3dBm,效率9.6%,频率范围86-94.3GHz
工艺节点
65nm CMOS
重要性
发表年份
ISSCC 2016

🏷 关键词

W波段发射机CMOS高输出功率高效率

📄 原文摘要

Southeast University, Nanjing, China to the TA high gain, the detection inaccuracy of Δt due to the circuit mismatch in PD and CP2 becomes negligibly small. VCCP is designed as a voltage-controlled current source as shown in Fig. 20.3.2. According to the detected Δt, the UP and DN currents in the VCCP are adjusted automatically to compensate for the current mismatch in CP1 to suppress the reference spur. 1 2 In W-band imaging and radar systems, transmitters (TXs) need to generate signals with high output power and low jitter while consuming low power [1,2]. However, existing CMOS W-band TXs need to cascade many power-hungry linear power-amplifier (PA) stages due to low transistor gains and high passive loss [3,4]. Even so, their output power is still quite limited, resulting in low efficiency. In addition, existing W-band phase-locked loops (PLLs) suffer from large jitter because of large phase noise and reference spurs.

👥 作者与机构

Yue Chao1, Lianming Li2, Howard Cam Luong1

Hong Kong University of Science and Technology, Hong Kong, China,

分类:RF & Wireless · 年份:ISSCC 2016