A 300GHz Wirelessly Locked 2×3 Array Radiating 5.4dBm with 5.1% DC-to-RF Efficiency in 65nm CMOS

📋 论文概要

本文提出了一种在65nm CMOS工艺中实现的300GHz无线锁定2×3阵列，通过创新的锁相技术实现了5.4dBm的辐射功率和5.1%的直流到射频效率，解决了太赫兹频段CMOS阵列频率和相位锁定困难的问题。

💡 主要创新点

• 提出了一种可扩展的辐射发射阵列结构，实现了2×3阵列的无线频率和相位锁定。
• 在65nm CMOS工艺中实现了300GHz频段的高效辐射，达到了5.4dBm的辐射功率和5.1%的直流到射频效率。

🏷 关键词

📄 原文摘要

CMOS technology innovations over the last decades opened doors to the possibility of designing fully integrated systems in CMOS at THz frequencies. Small antenna sizes at THz frequencies make CMOS and silicon attractive for steerable 2D transmitter and receiver arrays. Previous works successfully showed THz-source arrays with the use of on-chip antennas [1-5]. However, it is still a challenge implementing such arrays that are frequency and phase locked, with significant radiated power and efficiency in standard CMOS without costly additions. In this work we propose a scalable radiating-transmitter approach in 65nm CMOS that achieves a radiated power of +5.4dBm at 0.3THz using only a 2×3 on-chip array, an EIRP of +22dBm and 5.1% of radiated-power-to-DC power efficiency. The solution in this work aims to solve several existing issues in CMOS THz radiating arrays. The first is the antenna efficiency. The silicon bulk in standard

👥 作者与机构

Samuel Jameson, Eliezer Halpern, Eran Socher

Tel Aviv University, Tel Aviv, Israel